wersja 1.1
-------------------------------------------------------------------------------------------
FlashRom/PWM area
-------------------------------------------------------------------------------------------
Obszar $dc40 - $dc7F
FLashROM:
Adres $DC40- - DC41

TRYB FLASH (zworki w pozycji flash)
$DC40 -  7 downto 0 , lo byte adress of flash rom,

$DC41 - bit (7) - (1) - permission to write/read in area $df00 - $dfff,
	bit 3 downto 6 -  reserved,
	bit 2 downto 0 - hi bits of flash rom adress.


$DF00-$DFFF - zawartość flash'a po zezwoleniu zapis/odczyt/ contains FlashRom area after seup of bit(7) IN $DC41
		------------------------------------------------------
TRYB PRACY NORMAL:
DC40 - lo byte PWM - jeżeli (jeżeli=if) SWAP = '0';
	hi byte PWM - jeżeli SWAP = '1';
DC41 - 0-3 hi nibble PWM, jeżeli SWAP = '0'
	0-3 lo nibble PWM, jeżeli SWAP = '1'		

	BIT 7 - przyśpieszenie (speeder) ca. +28,5% (1,266MHz) (1-ON po resecie 0)
		pomysł z artykułu Spider/APD www.filety.pl/sprzęt/przełącznik1.4MHz. 

	BIT 6 - PCM signed/unsigned (wykonuje XOR MSB w zależności od wartości 			SWAP);
	BIT 5 - swap , zamiana bitów (DC40 HI byte, DC41 LO nibble), 
				----------------------------------
				16PCM 
				lda pcm16lo
				lsr a
				lsr a
				lsr a
				lsr a
				ora #%01100000 ; SWAP=1, value signed.
				sta $dc41
				lda pcm16hi
				sta $dc40
				-----------------------------------
				12PCM - 2 value player
				lda pcm12lo1
				sta $dc40     ; LSB
				lda pcm12hi
				and #$0f      ; unsigned 12bit
				sta $dc41     ; hi nibble
						
				lda pcm12hi
				lsr a
				lsr a
				lsr a
				lsr a
				ora #%00100000 ; unsigned 12bit swap=1
				sta $dc41      ; lo nibble  
				lda pcm12hi2
				sta $dc40     ; MSB    
				------------------------------------
				8PCM
				lda #%01100000 ; 0-3 możemy używać do dihteringu
				sta $dc41 ; ustawiamy tylko raz / set it up only one time.

				lda pcm8       ; MSB
				sta $dc40
-------------------------------------------------------------------
DC60 - DC7F - Obszar sterowania MSP430 (underconstruction)
		DC60 in/out register,
		DC81 output only register with handshake
		DC62 Status register
			B7 - handshake read only,
			B6 - kierunek in/out (0 - in)
			B0 - komenda/dane (0 - command)

				
-----------------------------------------------------------------------------------------
Memory expansion registers
------------------------------------------------------------------------------------------
$dcc0 - $dcdf

(Memory expansion bassed on internal 256 kB memory expansion published in MikroBITTI, version called 1795 done by Kenjiro/3lux in 1995, see old prototype foto assebled with 2x44256!, optional software: 
http://www.zimmers.net/anonftp/pub/cbm/documents/projects/memory/c64/index.html)

Rozszerzenie do 2MB
After reset, memory map is as follow:
Bank0 $0c0000 - $0c3FFFF;
Bank1 $0d4000 - $0d7FFFF;
Bank3 $0e8000 - $0eBFFFF;
Bank4 $0fC000 - $0fFFFFF;

Bank 08, jest zastrzeżony na bufory DOS-a w lokacji tej, obszar 081f00-081fff jest widoczny pod adresem $df00-$dff po ustawieniu bitu (3) w $dcc1. 
Bank $08 contains values for bios/dos (more info in sources)

$DCC0 - register Bank 0 i 1
	bits 7 downto 4 - Bank 1 adress,
	bits 3 downto 0 - Bank 0 adress, 
$DCC1 - register Bank 0 i 1 ($00)
	bit (7) - fix VIC bank to adress 0c0000-0c3ffff, area 081f00 - 081fff is visible in 		$df00 - $dfff as bufor for fast in/out procedures.
	bits (6 downto 4) - Bank1 adress (you can set 2MB area for Bank 0,1,2,3 ($00-$7F),
	bit (3) - Bank 0 adress 
	bit (2) - compatibilty bit for PIA 6821 chip and old software,
	bit (1-0) - Bank 0 adress 
$DCC2 - register Bank 0 i 1
	bits 7 downto 4 - Bank 3 adress,
	bits 3 downto 0 - Bank 2 adress, 

$DCC3 - register Bank 2 i 3
	bit (7) - reserved
	bits 6 downto 4 - Bank 3 adress,
	bit (3) - Bank2 adress
	bit (2) - compatibilty bit for PIA 6821 chip,
	bit 1 downto 0 -  Bank2 adress;
Writing value to adress location of bank0 you can change FlashRom location that is visible in area of Basic and Kernal.
If you have 0,5, 1 or 1,5 MB wersion of memory you will got wholes in memory area of random numbers.
Memory has got an backup battery for fast access to  macroassembler and other tools/datas.
-------------------------------------------------------------------------------------------
IDE area
-------------------------------------------------------------------------------------------


DC80-DC8F - registers 1Fx IDE
$DC80 - $DC81 - 16/8 bits data register,
$dc82 - error register,
$dc84 - Sector Count Register,
$dc86 - Sector number / LBA
$dc88 - Cylinder lo / LBA
$dc8a - cylinder hi / LBA
$dc8c - head / drive register (LBA)
$dc8e - status/ command register 

DC90-DC9f - registers 3Fx IDE
$dc9c - alt. status register,
$dc9e - drive register
For more details of how IDE drive works please click: http://www.ata-atapi.com/hiwfaq.htm


12.05.08 by Kisiel/ICON

	




